Hasil Pencarian  ::  Simpan CSV :: Kembali

Abstrak :
Sampai saat ini ATM switch generasi Pertama menggunakan skema Explicit Forward Congestion Indication (EFCI) untuk kontrol kongesti layanan trafik ABR. Dengan cepatnya perkembangan teknologj Switching, generasi kedua ATM switch akan Dilengkapi dengan mekanisme kontrol kongesti Explicit Rate (ER). Skema Enhanced proportional Rate Control Algorithm, (EPRCA) merupakan salah satu mekanisme kontrol kongesti ER yang telah menjadi stand didalam ATM Forum. Karena mempunyai performansi yang cukup baik dan kemudahan dalarn implementasi, maka skema EPRCA akan menjadi pilihan beberapa vendor ATM untuk kontrol kongesti layanan trafik ABR. Pada periode transisi dari generasj pertama ke generasi kedua ATM switch, penggun skema EFCI dengan EPRCA dalam suatu jaringan ATM tidak dapat dihindarkan. Karena terdapat perbedaan dalam Operasi kerjanya, maka interoperabilitas penggunaan kedua skema kontrol kongesti tersebut akan menimbulkan permasalahan dan isi performansi yang dihasilkan. Dalam tesis ini, akan diteliti pengaruh penggunaan barga parameter kontrol Rate Increase Factor (RIF) yang berbeda terhadap hasil performansi pada skema EFCI dan skema EPRCA, serta pada interoperabilitas skema EFCI dengan EPRCA dalam suatu jaringan ATM. Dari hasil simulasi dapat ditunjukkan bahwa beat-down problem yang terjadi pada Iingkungan skema EFCI merupakan fungsi dan parameter kontrol RIF dan dengan RIF yang agresif tinggi dapat diperoleh performansi yang cukup baik. Sedangkan pada skema EPRCA, pengaruh penggunaan harga RIF yang berbeda tidak akan menyebabkan beat-down problem dan performansi yang dihasilkan sesuai dengan yang diharapkan. Sedangkan hasil performansi pada interoperabilitas skema EFCI dengan EPRCA sangat dipengaruhi oleh pemeliharaan harga RIF dan lokasi penempatan skema EPRCA. Untuk harga RIF yang konservatif rendah akan terjadi peningkatan performansi sebaliknya untuk harga RIF yang agresif tinggi akan mengakibatkan penurunan Performansi. Beat-down problem yang terjadi untuk sumber yang melewati multi-hop link pada lingkungan skema EFCI dapat dihilangkan jika skema EPRCA ditempatkan Pada least critical switch. ......Currently, the first generation of the ATM switches use Explicit Forward Congestin Indication (EFCI) scheme for Congestion control mechanism of the ABR services. With the advances in switching technologies, the next generation of the ATM switches will employ the Explicit Rate (ER) congestion control mechanisms. The Enhanced Proportional Rate Coritol Algorithm (EPRCA) scheme is selected as one of the ER congestion control mechanisms by the ATM Forum. Because the EPRCA scheme has good performance and low implementation complexity, the ATM switch vendors will use it for congestion control mechanism of the ABR services. During transition period from the first to the second generation of the ATM switches, the interoperability between EFCI and EPRCA schemes in the ATM net? ork became unavoidable. Because of the differences in their basic operating incehanisilis, their interoperation may be problematic in terms of the network perfoniiance. This thesis focuses on the impact on performance of the Raie Increase Factor (RIF) parameter selection in the EFCI and EPRCA schemes, also in the ititeroperahility between EFCI and EPRCA schemes. The simulation results show that beat-down problem in an all EFCI scheme environment is function of RIF parameter. A more aggressive RIF value leads to a hìgher performance. However, in the EPRCA scheme environment with use different value of the RIF parameter, it will not make any beat-down problem and the performance results as expected. From the interoperability perspective, the simulations conducted show that the RIF parameter selection and location of the EPRCA scheme will drive the performance of interoperability between EFCI and EPRCA schemes. With conservative RIF value will leads to performance improvement. On the other hand, with aggressive RIF value will leads to performance degradation. Beat-down problem of a multi-hop link in the EFCI scheme environment might be omitted if the EPRCA scheme is located at ihe Least critical switch.

Abstrak :
This book describes an original improvement in power quality of photovoltaic generation systems obtained by the use of a multilevel inverter implemented with level doubling network (LDN). Modulation principles and harmonic analysis of output voltages are proposed and introduced in detail for both single and three-phase LDN configurations. The analysis is then extended to dc-link current and voltage, with emphasis to low-frequency harmonics and switching frequency ripple. This work represents the first comprehensive implementation of maximum power point tracking (MPPT) schemes using the ripple correlation control (RCC) algorithm in the presence of multiple ripple harmonics, such as in the case of multi­level inverters. Numerical simulations and experimental tests are carefully reported here, together with practical insights into the design of dc-link capacitors.

Abstrak :
The book begins by discussing the distinctive features of ESs, above all their cybernetic-physical character, and how they can be designed to deliver the required performance with a minimum amount of hardware. In turn, it presents a range of design methodologies. Considerable attention is paid to the hardware implementation of computational algorithms. It is shown that different parts of complex ESs could be implemented using models of finite state machines (FSMs). Also, field-programmable gate arrays (FPGAs) are very often used to implement different hardware accelerators in ESs. The book pays considerable attention to design methods for FPGA-based FSMs, before the closing section turns to programmable logic controllers widely used in industry.