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"Voice scrambler dapat diimplementasikan secara real time dengan menggunakan prosesor DSP yang terintegrasi pada suatu stater kit, yakni DSP Starter Kit TMS320C6713. Metode voice scrambler yang digunakan dalam implementasi ini adalah dengan menggunakan frequency inversion. Frequency inversion adalah suatu metode yang mengubah frekuensi rendah menjadi frekuensi tinggi dan sebaliknya. Voice scrambler ini menghasilkan karakter output yang dapat dianalisis dengan menggunakan bantuan garfik FFT (Fast Fourier Transform). Analisis performa dilakukan dengan menggunakan frekuensi sampling pada codec, yaitu 8, 16, 32, 48, dan 96 kHz. Dalam percobaan yang dilakukan didapat hubungan pengaruh besarnya frekuensi sampling codec terhadap performa voice scrambler. Hubungannya, semakin besar frekuensi sampling codec, maka akan semakin banyak jumlah frekuensi efektif voice scrambler. Sehingga dengan semakin banyaknya jumlah frekuensi efektif scrambling tersebut, menyebabkan semakin baik performa voice scrambler tersebut.

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Voice scrambler can be implemented on DSP procesor using DSP Starter Kit TMS320C6713. The scrambling method used is frequency inversion. The frequency inversion is change the low frequency to the high frequency, and vice versa. Voice scrambler generate the output character, that can be analyzed by using FFT (Fast Fourier Transform) method. The Performance analysis using codec frequency sampling, that is 8, 16, 32, 48, and 96 kHz. The result of the experiment is the relationship between codec frequency sampling with voice scrambler performance. The relation is if the codec frequency sampling increase, then the sum of efective scrambling frequency is increase too. This point will be make voice scrambler better."

"This book cover a key subject for the successful realization of DSP algorithms for communications, multimedia, and healthcare applications. The book addresses the need for DSP architecture design that maps advanced DSP algorithms to hardware in the most power- and area-efficient way. The key feature of this text is a design methodology based on a high-level design model that leads to hardware implementation with minimum power and area. The methodology includes algorithm-level considerations such as automated word-length reduction and intrinsic data properties that can be leveraged to reduce hardware complexity. From a high-level data-flow graph model, an architecture exploration methodology based on linear programming is used to create an array of architectural solutions tailored to the underlying hardware technology."