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Abstrak :
Hardware Fault-Tolerance is the set of techniques to remain operational after a fault by design. Programmable Logic Devices are good platforms to implement Hardware Fault-Tolerant techniques by utilizing abundant resources and facilitating self healing operations. In this paper we propose a hardware fault—tolerant architecture to duplicate components in order to replace faulty ones. The proposed architecture is markedly different from other works that mostly focuses on reconfiguring and evolving logic units rather than our evolvable memory units. The self-reparation process for a memory failure is the reallocation and synchronization of memory content. The internal flip-flops form an abundant reconfigurable resource and are reconfigured to work as newly created memory. The proposed architecture has been downloaded and tested on a real F PGA development board and has satisfied all of its pre-defined specifications.