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"Contents :- Microelectronics failure analysis desk reference, 2001 supplement - Preface - Microelectronic Failure Analysis Desk Reference 2001 Supplement - FIB Backside Isolation Techniques - The SEM Lab, From Laboratory Logistics to Final Sample Preparation Techniques for SEM Analysis of Semiconductors - Cross Sectioning with a Pivoting Sample Block - Focused Ion Beam Cross Sectioning as a Compliment or an Alternative to Conventional Mechanical Sectioning Techniques - Alternatives to Cross-Sectional Simple Preparation for Package and Board-Level Failure Analysis - Automation To Boost Productivity And Increase Repeatability: (A Sampling of Available Tools and Vendors) - Multi-Functional, Semi-Automatic Sample Preparation for Failure Analysis - SMPT©-Sub-Micron Polishing Technology For Automated Sample Preparation - Automated Techniques For SEM And TEM Sample Preparation - Sample Preparation Techniques for Site-Specific Cross-Sectional Analysis of High-Aspect-Ratio FIB Repair Sites - Deprocessing, Cross-Sectioning and FIB Circuit Modification of Parts Having Copper Metallization - Scanning Capacitance Microscopy of Junction and Non-Junction Samples - Electrical Probing of Deep Sub-Micron Integrated Circuits Using Scanning Probe Techniques - Application of Tunneling Atomic Force Microscopy (TUNA) to Failure Analysis - GoFATA: Glossary of Failure Analysis Tool Acronyms - ISTFA Subject Index "

"Contents : - Foreword - The Microelectronics Desk Reference - System Level Failure Analysis Process: Making Failure Analysis a Value Add Proposition in today’s High Speed Low Cost PC environment - Board Level Failure Mechanisms and Analysis in Hand-held Electronic Products - Failure Analysis Flow for Package Failures - Wafer Level Failure Analysis Process Flow - Flip-Chip and “Backside” Sample Preparation Techniques - Failure Analysis in a Fabless/Outsourced World - Circuit Edit at First Silicon - The Process of Editing Circuits Through the Bulk Silicon - Curve Tracer Data Interpretation for Failure Analysis - A Primer on Simple Device Problems and Curve Tracer Characteristics - Electronics and Failure Analysis - Analog Device and Circuit Characterization - IC Testing: Background, Directions and Opportunities for Failure Analysis - Using Scan Based Techniques for Fault Isolation in Logic Devices - The Power of Semiconductor Memory Failure Signature Analysis - Common Defects Encountered During Semiconductor Manufacturing - System Level Board Fabrication and Assembly Process Anomalies and Associated Failures Categories - Characterization of Anomalies in Flip-Chip Solder Joins in Ceramic Packaging - Identification of Latent Defects in Advanced Glass Ceramic MCM Packaging 181 Electrostatic Discharge (ESD) and Latchup Failures in Advanced CMOS Technologies - Electrical and Optical Characterization of Latchup - Failure Analysis of Microelectromechanical Systems (MEMS) - Failure Analysis of Passive Components - Failure Analysis and Reliability of Optoelectronic Devices - Die-level Fault Localization with X-ray Microscopy - X-ray Microtomography Tools for Advanced IC Packaging Failure Analysis - Acoustic Microscopy of Semiconductor Packages - Electronic Package Fault Isolation Using TDR - Current Imaging using Magnetic Field Sensors - Chip access techniques - Low Stress FA Sample Preparation of Flip Chip Devices with Low-K Dielectric Interconnect Layers - Plastic BGA Module FA Process Flow Development - Chip-Scale Packages and Their Failure Analysis Challenges - Backside Analysis Using Re-Package Techniques - Photon Emission Microscopy - Fundamentals of Photon Emission (PEM) in Silicon – Electroluminescence for Analysis of Electronic Circuit and Device Functionality - Picosecond Imaging Circuit Analysis – PICA - Thermal Defect Detection Techniques - Thermal Failure Analysis by IR Lock-in Thermography - Beam-Based Defect Localization Methods - Principles of Thermal Laser Stimulation Techniques - Introduction to Laser Voltage Probing (LVP) of Integrated Circuits - SEM and FIB Passive Voltage Contrast - Electron Beam Probing - Delayerimg Techniques: Dry Processes Wet Chemical Processing and Parallel Lapping - Plasma Delayering of Integrated Circuits - The Art of Cross Sectioning - Delineation Etching of Semiconductor Cross Sections - Special Techniques for Backside Deprocessing - Deprocessing Techniques for Copper, Low K, and Soi Devices - PCB SMT Solder Joint Failure Analysis - Improved Methodologies for Identifying Root-Cause of Printed Board Failures - Optical Microscopy - Scanning Electron Microscopy - Ultra-high Resolution in the Scanning Electron Microscope - Focused Ion Beam (FIB) Systems: A Brief Overview - Transmission Electron Microscopy for Failure Analysis of Integrated Circuits - Atomic Force Microscopy: Modes and Analytical Techniques with Scanning Probe Microscopy - Energy Dispersive X-ray Analysis - Analysis of Submicron Defects by Auger Electron Spectroscopy (AES) - SIMS Solutions for Next Generation IC Processes and Devices - Submicron CMOS Devices - Reliability and Quality Concepts for Failure Analysts - CAD Navigation in FA and Design/Test Data for Fast Fault Isolation - Best of the EDFAS Email Discussion Forum 2000-2004 - Failure Analysis Roadmaps - Assembly Analytical Forum Analytical Tool Roadmap ISTFA 2003 Rev 0 White Paper - Education and Training for the Analyst - Managing the Unpredictable – A Business Model for Failure Analysis Service - Management Principles and Practices for the Failure Analysis Laboratory - Failure Analysis Terms and Definitions - JEDEC Standards for Failure Analysis - Education/Training Sources and References - ISTFA Subject Index "

"Contents :- Foreword - The Microelectronics Desk Reference - System Level Failure Analysis Process: Making Failure Analysis a Value Add Proposition in today’s High Speed Low Cost PC environment - Board Level Failure Mechanisms and Analysis in Hand-held Electronic Products - Failure Analysis Flow for Package Failures - Wafer Level Failure Analysis Process Flow - Flip-Chip and “Backside” Sample Preparation Techniques - Failure Analysis in a Fabless/Outsourced World - Circuit Edit at First Silicon - The Process of Editing Circuits Through the Bulk Silicon - Curve Tracer Data Interpretation for Failure Analysis - A Primer on Simple Device Problems and Curve Tracer Characteristics - Electronics and Failure Analysis - Analog Device and Circuit Characterization - IC Testing: Background, Directions and Opportunities for Failure Analysis - Using Scan Based Techniques for Fault Isolation in Logic Devices - The Power of Semiconductor Memory Failure Signature Analysis - Common Defects Encountered During Semiconductor Manufacturing - System Level Board Fabrication and Assembly Process Anomalies and Associated Failures Categories - Characterization of Anomalies in Flip-Chip Solder Joins in Ceramic Packaging - Identification of Latent Defects in Advanced Glass Ceramic MCM Packaging - Electrostatic Discharge (ESD) and Latchup Failures in Advanced CMOS Technologies - Electrical and Optical Characterization of Latchup - Failure Analysis of Microelectromechanical Systems (MEMS) - Failure Analysis of Passive Components - Failure Analysis and Reliability of Optoelectronic Devices - Die-level Fault Localization with X-ray Microscopy - X-ray Microtomography Tools for Advanced IC Packaging Failure Analysis - Acoustic Microscopy of Semiconductor Packages - Electronic Package Fault Isolation Using TDR - Current Imaging using Magnetic Field Sensors - Chip access techniques - Low Stress FA Sample Preparation of Flip Chip Devices with Low-K Dielectric Interconnect Layers - Plastic BGA Module FA Process Flow Development - Chip-Scale Packages and Their Failure Analysis Challenges - Backside Analysis Using Re-Package Techniques - Photon Emission Microscopy - Fundamentals of Photon Emission (PEM) in Silicon – Electroluminescence for Analysis of Electronic Circuit and Device Functionality - Picosecond Imaging Circuit Analysis – PICA - Thermal Defect Detection Techniques - Thermal Failure Analysis by IR Lock-in Thermography - Beam-Based Defect Localization Methods - Principles of Thermal Laser Stimulation Techniques - Introduction to Laser Voltage Probing (LVP) of Integrated Circuits - SEM and FIB Passive Voltage Contrast - Electron Beam Probing - Delayerimg Techniques: Dry Processes Wet Chemical Processing and Parallel Lapping - Plasma Delayering of Integrated Circuits - The Art of Cross Sectioning - Delineation Etching of Semiconductor Cross Sections - Special Techniques for Backside Deprocessing - Deprocessing Techniques for Copper, Low K, and Soi Devices - PCB SMT Solder Joint Failure Analysis - Improved Methodologies for Identifying Root-Cause of Printed Board Failures - Optical Microscopy - Scanning Electron Microscopy - Ultra-high Resolution in the Scanning Electron Microscope - Focused Ion Beam (FIB) Systems: A Brief Overview - Transmission Electron Microscopy for Failure Analysis of Integrated Circuits - Atomic Force Microscopy: Modes and Analytical Techniques with Scanning Probe Microscopy - Energy Dispersive X-ray Analysis - Analysis of Submicron Defects by Auger Electron Spectroscopy (AES) - SIMS Solutions for Next Generation IC Processes and Devices - Submicron CMOS Devices - Reliability and Quality Concepts for Failure Analysts - CAD Navigation in FA and Design/Test Data for Fast Fault Isolation - Best of the EDFAS Email Discussion Forum 2000-2004 - Failure Analysis Roadmaps - Assembly Analytical Forum Analytical Tool Roadmap ISTFA 2003 Rev 0 White Paper - Education and Training for the Analyst - Managing the Unpredictable – A Business Model for Failure Analysis Service - Management Principles and Practices for the Failure Analysis Laboratory - Failure Analysis Terms and Definitions - JEDEC Standards for Failure Analysis - Education/Training Sources and References - ISTFA Subject Index "

"Contents - IPFA 2000 Best Paper Award Winner - Application of Focused Ion Beam System as a Defect Localization and Root Cause Analysis Tool - Session 1: Advanced Techniques 1 - X-Ray Tomography of Integrated Circuit Interconnects: Past and Future - X-ray Nanotomog Raphy (XRMT) Tool for Non-Destructive High-Resolution Imaging of ICs - Single Point PICA Probing with an Avalanche Photo-Diode - Session 2: Advanced Techniques 2 - Comparison of Laser and Emission Based Optical Probe Techniques - Resistive Interconnection Localization - Optical Waveform Probing–Strategies for Non-Flipchip Devices and Other Applications - Advanced LIVA/TIVA Techniques - Session 3: Packaging - Super-conducting Quantum Interference Device Technique: 3-D Localization of a Short Within a Flip Chip Assembly - Integration of SQUID Microscopy into FA Flow - Evaluation of alternative Preparation Methods for Failure Analysis at modern Chip-and Package Technologies - TDR Analysis of Advanced Microprocessors - Signal Trace and Power Plane Shorts Fault Isolation Using TDR - Session 4: Poster Session - Backside Etch: A New FA Technique for Gate Oxide Pinhole and Si Defect Identification for Power IC Devices - Fabrication Of Inexpensive Decapsulation Fixtures for Small or Unique Plastic Packages - Failure Analysis of Plasma-Induced Submicron CMOS IC Yield Loss by Backside Photoemission Microscopy - Failure Types & Analysis In Cu Process Development of Design-Rule 0.18 μm CPU - TEM Examination of a Specified Site Identified by X-SEM in Microelectronics Failure Analysis - Design Debug and Design Fix Verification in a Failure Analysis Lab for a RF/IF Circuit for Cellular Applications With High Battery Save and Electrostatic Discharge Leakage: A Case Study - Self Aligned Contact Wordline-Bitline Shorts in Memory ICs–a Comparative Study of a Failure Mode, Its Root Causes, And Simple, But Highly Effective Analysis Techniques - A Spatial Filtering Localisation Tool for Failure Analysis of Periodic Circuits - New Manifestation of Electrical Overstress in Advanced Device Technologies - Session 5: Backside 1 - Implementing Thermal Laser Stimulation in a Failure Analysis Laboratory - Calibration Technique for MCT FPA used for Backside Emission Microsopy - Liquid Immersion Objective for High-Resolution Optical Probing of Advanced Microprocessors - New Signal Detection Methods for Thermal Beam Induced Phenomenon - CNC Milling and Polishing Techniques for Backside Sample Preparation - Session 6: SPM - Characterization of MOS Devices by Scanning Thermal Microscopy (SThM) - Contactless Failure Analysis of Integrated Circuits Via Current Contrast Imaging with Magnetic Force Microscopy - Multiple Probe Deep Sub-Micron Electrical Measurements Using Leading Edge Micro-Machined Scanning Probes - Electrical Characterization of Circuits with Low K Dielectric Films and Copper Interconnects - Session 7: Backside 2 - Emission Microscopy and Thermal Laser Stimulation for Backside Failure Localization - CMOS Front-End Investigation over Large Areas by Deprocessing from the Back Side - New Techniques for the Identification of Defects in Multi-Layer Flip-Chip Packages - Session 8: Case Histories 1 - Board Level Failure Analysis of Chip Scale Packages - IC Failure by Electrical Overstress (EOS) - The Search for the Elusive EOS Monster - Session 9: FIB - Effect of Ga Staining due to FIB Editing on IR Imaging of Flip Chips - Water Vapor Enhancement for Elemental Analysis Using Focused Ion Beam Secondary Ion Mass Spectrometry (FIB-SIMS) - Various Focused Ion Beam Microsurgery Techniques in Dealing with Copper Metalization in ICs - Reliability of Bipolar and MOS Circuits After FIB Modification - Mass Production Cross-Section Tem Samples by Focus Ion Beam Masking and Reactive Ion Etching - Session 10: Case Histories 2 - A Successful Failure Analysis Using Front and Backside Fault Localization Techniques on a Deep Sub-Micron CMOS Device - Use of STEM in Nanometer Level Defect Analysis of SRAM Devices - A New Deprocessing Technique By Selective Wet-Etch Of Passivation And Inter Metal Dielectric Layers For Submicron Devices - SRAM Failure Analysis Flow - Physical Failure Analysis on Vertical Dielectric Films - Session 11: MEMS - Design for Reliability of MEMS/MOEMS for Lightwave Telecommunications - Mechanical Characterization of Materials Used in MEMS - Optical Imaging of High-Frequency Resonances and Semi-Static Deformations in Micro-Elec"

"The objectives are the book are to provide an understanding of the characteristics of semiconductor devices and commonly used integrated circuits; to develop skills in analysis and design of both analog and digital circuits; and to familiarize students with various elements of the engineering design process , including formulation of specifications, analysis of alternative solutions, synthesis, decision making, iterations, consideration of cost factors, simulation and tolerance issues"